1. Field of the Invention
The present invention generally relates to support circuits for semiconductor memory arrays, such dynamic random access memories (DRAMs), and, more particularly, to an off-chip driver (OCD) circuit which implements a voltage regulated pre-drive technique to reduce di/dt noise.
2. Description of the Prior Art
Fast charging and discharging of off-chip output load capacitance causes di/dt noise (inductive/resistance voltage drops) in the connection lead between the external applied voltage V.sub.CC and the internal chip voltage V.sub.DD and between external ground GND and internal chip ground V.sub.SS. This di/dt noise can be sufficient to cause circuit malfunction. In the following circuit description, V.sub.DD is taken to be substantially equal to V.sub.CC and similarly V.sub.SS is taken to be substantially equal to GND. An OCD designed to meet delay requirements at low tolerance V.sub.CC will cause excessive noise when operated at high tolerance V.sub.CC conditions.
Prior attempts to reduce di/dt noise include controlling the gate voltage slew and various configurations which control the turn-on of multiple driver stages. Although these methods provide di/dt control at a given V.sub.CC the problem of increased speed and noise as V.sub.CC increases still poses a problem.
The general idea of incorporating a voltage regulator at the power supplies of the OCD predrive is shown in U.S. Pat. No. 4,958,086 to Wang et al. More specifically, the approach taken by Wang et al. was to couple a voltage regulator to power supply voltage terminals of an output buffer in order to provide a voltage substantially independent of fluctuations in V.sub.CC. The voltage regulation is applied only to the last stage of the predriver of the output buffer. While this approach was effective in limiting di/dt noise in the simple output buffer to which it is applied, it is not adequate to more modern high speed integrated circuits (ICs) such as the newer high density DRAM chips.